Seminar on Power & Signal Integrity for FPGA Development in Hardware-Accelerated Networking at the Navacchio Technology Park

Seminar on Power & Signal Integrity for FPGA Development in Hardware-Accelerated Networking at the Navacchio Technology Park

Yesterday, the seminar “Power & Signal Integrity for FPGA Development in Hardware-Accelerated Networking” was held at the Navacchio Technology Park, organized in collaboration with ALLdata Srl and Rohde & Schwarz. The event was attended by industry experts, professionals, and technology enthusiasts.

During the seminar, the challenges and opportunities related to FPGA development and hardware-accelerated networking were explored, with high-level technical presentations and live practical demonstrations. Among the speakers was our President, Prof. Stefano Giordano, Professor at the Department of Information Engineering at the University of Pisa.

We would like to extend our heartfelt thanks to all the participants and speakers for their contributions, and in particular to Luigi Lorusso, Tommaso Tessitore, Stefano Spizzica, and Stefano Giordano for making this event a success.